---------------------------------------------------------------------------------- -- Company: Cal Poly San Luis Obispo -- Engineer: Chase Timmins / Shivani Ganti -- -- Create Date: 11/16/2017 02:41:45 AM -- Design Name: -- Module Name: Segment_Handler - Behavioral -- Project Name: Pong_Game -- -- Revision: -- Revision 0.01 - File Created -- Additional Comments: -- ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx leaf cells in this code. --library UNISIM; --use UNISIM.VComponents.all; entity Segment_Handler is Port ( Digit : in STD_LOGIC_VECTOR (3 downto 0); Cathodes : out STD_LOGIC_VECTOR (6 downto 0)); end Segment_Handler; architecture Behavioral of Segment_Handler is begin encode_segment: process (Digit) -- Encoder begin case (Digit) is when "0000" => Cathodes <= "0000001"; -- 0 when "0001" => Cathodes <= "1001111"; -- 1 when "0010" => Cathodes <= "0010010"; -- 2 when "0011" => Cathodes <= "0000110"; -- 3 when "0100" => Cathodes <= "1001100"; -- 4 when "0101" => Cathodes <= "0100100"; -- 5 when "0110" => Cathodes <= "0100000"; -- 6 when "0111" => Cathodes <= "0001111"; -- 7 when "1000" => Cathodes <= "0000000"; -- 8 when others => Cathodes <= "0000100"; -- 9 end case; end process; end Behavioral;