game Project Status (12/06/2014 - 10:40:37)
Project File: FinalProject.xise Parser Errors: No Errors
Module Name: game Implementation State: Synthesized
Target Device: xc3s500e-4fg320
  • Errors:
No Errors
Product Version:ISE 14.5
  • Warnings:
2 Warnings (0 new)
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Device Utilization Summary (estimated values) [-]
Logic UtilizationUsedAvailableUtilization
Number of Slices 167 4656 3%
Number of Slice Flip Flops 159 9312 1%
Number of 4 input LUTs 328 9312 3%
Number of bonded IOBs 48 232 20%
Number of BRAMs 1 20 5%
Number of GCLKs 2 24 8%
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSat Dec 6 10:40:36 201402 Warnings (0 new)6 Infos (0 new)
Translation ReportOut of DateFri Dec 5 13:55:54 2014000
Map ReportOut of DateFri Dec 5 13:56:02 2014029 Warnings (0 new)3 Infos (0 new)
Place and Route ReportOut of DateFri Dec 5 13:56:16 201405 Warnings (0 new)2 Infos (0 new)
Power Report     
Post-PAR Static Timing ReportOut of DateFri Dec 5 13:56:18 2014006 Infos (0 new)
Bitgen ReportOut of DateFri Dec 5 13:56:28 2014029 Warnings (0 new)0
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateFri Dec 5 13:57:26 2014
WebTalk ReportOut of DateFri Dec 5 13:56:28 2014
WebTalk Log FileOut of DateFri Dec 5 13:56:32 2014

Date Generated: 12/06/2014 - 12:16:44