---------------------------------------------------------------------------------- -- Company: CPE 133 Digital Design -- Engineer: Ian Brown, William Le, Michael Djaja, and Chrisitan Cooper -- -- Create Date: 11/16/2015 10:37:08 AM -- Design Name: -- Module Name: FSM - Behavioral -- Project Name: SmartSwitch Light Switch -- Target Devices: -- Tool Versions: -- Description: -- -- Dependencies: -- -- Revision: -- Revision 0.01 - File Created -- Additional Comments: -- ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx leaf cells in this code. --library UNISIM; --use UNISIM.VComponents.all; entity FSM is Port ( O : in STD_LOGIC; --when true, the outer sensor has been triggered I : in STD_LOGIC; --when true, the inner sensor has been triggered Clk : in STD_LOGIC; --this is the clock signal A : out STD_LOGIC; --when true, the counter increases by 1 S : out STD_LOGIC); --when true, the counter decreases by 1 end FSM; architecture Behavioral of FSM is type state is (idle, goin, plus, goout, minus); signal ps, ns: state; signal num: STD_logic_vector (2 downto 0); signal div_clk : STD_LOGIC; component clk_div4 is Port ( clk : in std_logic; sclk : out std_logic); end component clk_div4; begin Slow_clk : clk_div4 port map( clk => Clk, sclk => div_clk); change: process(Clk) begin --this process simply updates the state on every rising edge of the clock if rising_edge(Clk) then ps <= ns; end if; end process change; state0: process(ps,O,I,Clk) begin --this process determines what the next state should be based on the present state and inputs ns <= idle; case ps is when idle => num <= "000"; --in this state, no sensors are bring triggered A <= '0'; S <= '0'; if (O = '0' and I = '0') or (O = '1' and I = '1') then ns <= idle; elsif (O = '1' and I = '0') then ns <= goin; elsif (O = '0' and I = '1') then ns <= goout; end if; when goin => num <= "001"; --in this state, the outer sensor has been triggered before the inner; a person may be entering A <= '0'; S <= '0'; if (O = '1' and I = '0') or (O = '1' and I = '1') then ns <= goin; elsif (O = '0' and I = '0') then ns <= idle; elsif (O = '0' and I = '1') then ns <= plus; end if; when plus => num <= "010"; --this state shows that a person has entered the room and increases the count by 1 A <= '1'; S <= '0'; ns <= idle; when goout => num <= "011"; --in this state, the inner sensor has been triggered before the outer; a person may be exiting A <= '0'; S <= '0'; if (O = '0' and I = '1') or (O = '1' and I = '1') then ns <= goout; elsif (O = '0' and I = '0') then ns <= idle; elsif (O = '1' and I = '0') then ns <= minus; end if; when minus => num <= "100"; --this state shows that a person has exited the room and decreases the count by 1 A <= '0'; S <= '1'; ns <= idle; when others => num <= "100"; A <= '0'; S <= '1'; ns <= idle; end case; end process state0; end Behavioral;